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1/18 AN1606 application note november 2002 l4981 pfc controller this application features the l4981 pfc controller. it is a high performance device operating in average current mode with many on-chip functions. the driver output stage can deliver 1.5a, which is very important for this type of application. a detailed device description can be found in an628. a functional block diagram is shown in figure 1. figure 1. functional diagram by ugo moriconi a "bridgeless p.f.c. configuration" based on l4981 p.f.c. controller. this technical document describes an innovative topology dedicated to a medium to high power pfc stage. the originality of this topology is the absence of the bridge that usually is placed between the emc filter and the pfc stage. the advantages of this topology can be found in terms of increased ef- ficiency and improved thermal management.
AN1606 application note 2/18 description of "bridgeless pfc configuration" topology the conventional boost topology is the most efficient for pfc applications. it uses a dedicated diode bridge to rectify the ac input voltage to dc, which is then followed by the boost section. see figure 2. this approach is good for a low to medium power range. as the power level increases, the diode bridge begins to become an important part of the application and it is necessary for the designer to deal with the problem of how to dissipate the heat in limited surface area. the dissipated power is important from an efficiency point of view. figure 2. the bridgeless configuration topology presented in this paper avoids the need for the rectifier input bridge yet maintains the classic boost topology. this is easily done by making use of the intrinsic body diode connected between drain and source of powermos switches. a simplified schematic of the bridgeless pfc configuration is shown in figure 3. figure 3. load l a controller rs v_rs mains m d inductor controller mains load l o a d inductor m1 m2 d1 d2
3/18 AN1606 application note the circuit shown from a functional point of view is similar to the common boost converter. in the traditional to- pology current flows through two of the bridge diodes in series. in the bridgeless pfc configuration, current flows through only one diode with the powermos providing the return path. to analyze the circuit operation, it is necessary to separate it into two sections. the first section operates as the boost stage and the second section operates as the return path for the ac input signal. referring to figure 4, the left side (figure 4a) shows current flow during the positive half cycle and the right side (figure 4b) shows current flow during the negative half cycle figure 4. positive "half cycle." when the ac input voltage goes positive, the gate of m1 is driven high and current flows from the input through the inductor, storing energy. when m1 turns off, energy in the inductor is released as current flows through d1, through the load and returns through the body diode of m2 back to the input mains. see figure 4a during the-off time, the current throw the inductor l (that during this time discharges its energy), flows in to the boost diode d1 and close the circuit through the load. negative "half cycle". during the negative half cycle circuit operation is mirrored as shown in figure 4b. m2 turns on, current flows through the inductor, storing energy. when m2 turns off, energy is released as current flows through d2, through the load and back to the mains through the body diode of m1. note that the two powermosfets are driven synchronously. it doesn't matter whether the sections are per- forming as an active boost or as a path for the current to return. in either case there is benefit of lower power dissipation when current flows through the powermosfets during the return phase. current sensing. the pfc function requires controlling the current drawn from the mains and shaping it like the input voltage waveform. to accomplish this it is necessary to sense the current and feed its signal to the control circuit. in average current conventional boost topology, we sense the rectified current rather than the ac input current. this can be achieved by a simple sensing resistor in the return of the current to the bridge, as shown in figure5a. in v l o a d controller l 0 v 1 m 2 m 1 d 2 d positive half cycle fig4a c h o p p e r return l o a d in v controller l 0 v 1 m 2 m 1 d 2 d negative half cycle fig4b c h o p p e r return
AN1606 application note 4/18 the l4981a/b current loop is designed to handle this negative signal. this type of resistor current sense can easily be achieve in medium power applications. for high power pfc circuits it is necessary to use a magnetic current transformer for improved efficiency as shown in figure 5b. in the bridgeless pfc configuration since an input rectifier bridge is not used, the current is continuously chang- ing its direction and the complexity of current sensing with a simple resistor can increase. also in high power applications, resistor sensing may dissipate too much power. in these cases, current sensing with a current transformer is the preferred approach. a current sense transformer core is typically high permeability ferrite (toroidal or a small core set). the primary of the transformer is a single turn of wire through the core. the secondary typically consists of 50 to 100 turns. figure 5. . this type of sense transformer cannot operate at low frequency and for this reason it must be connected where the current is switched at high frequency. the magnetic core must be allowed reset. this is normally accomplished by using a diode. in order to reproduce the inductor's current in boost topology, two of magnetic sense sections are needed and the simplified schematic is shown in figure 5b. when the sense transformer solution is applied in the bridgeless topology, the simple sense as in fig5b, is no longer valid. v s r s il iret. fig.5a standard sensing inductor magnetic sensing for high power fig.5b v s r s iret. il inductor lm_p rs 1:n typical sense transformers
5/18 AN1606 application note the circuitry is more complex than in the boost case because here we have two pair of powermos (m1, m2) and diodes (d1, d2) alternating. it is necessary to sense the chopping current of the (powermos + diode) section and to sum the signals to be applied to rs. the sensing of the diode's current can be simply done by placing a magnetic sensor at the common cathode (l2 in fig.6.). only one of the two diodes operates each half input cycle. figure 6. for the powermosfet portion of the circuit, the complexity increases because during the half cycle when one of the powermosfets is chopping, the other one has to handle the current flowing back to the mains. using the configuration of sensors as shown in figure 6 it is possible to solve the problem without undue com- plexity. the unnecessary high frequency portion of the current signal is cancelled because of the method m1 is connected to l1a as shown in figure 6b. the problem due to the change of polarity during each half cycle is solved by using a center tapped secondary and two rectifiers. since the coupling of the two windings must not permit the demagnetization of l1, an auxiliary transistor q1 is used that opens the circuit during the off-time. for the l4981 controller, the off-time is guaranteed not to be less than 5% of the period. q1 can be a small signal transistor because its switched current is low due to the fact that the transformer secondary will have a large number of turns. to realize the current sensing transformer, a high permeability toroidal core (ur=>5000) has been used. the secondary has 50 turns as a compromise to reduce secondary current yet not require a large number of turns. l2 v s i in l o a d r s m 1 m2 controller q1 d 1 d 2 l1 structure of sense transformers l2 l1
AN1606 application note 6/18 fig 6b other control circuits input voltage sensing: in the standard boost topology the rectified input voltage waveform is sensed using a re- sistor that, by one internal circuit, delivers the mirrored signal to one of the multiplier's inputs (iac-pin4). for the bridgeless configuration see the circuit shown in fig.7. l2 l o a d r s v s l1a l1b controller m 1 m 2 q1 d 1 d 2 da db dc f i in inductor l1a l1b l1=l1a+l1b l2 l1 tot f v s v s v r s f f m2_d2 chopping phase l1a l1b l1=l1a+l1b l2 l1 tot v sa v sb v r s ff f m1_d1 chopping phase
7/18 AN1606 application note figure 7. it is based on the following consideration: the frequency of the signal of interest (tens of hz), is much lower than the switching frequency (tens of khz). the boost inductor, for the low frequency, behaves like a short circuit. since the powermos's drains are, in turns, close to ground (via the body diode), the resulting equivalent circuit is shown in fig7b. the relation between the voltage (from the inductor) and the current that flows in to iac pin is: a) where: and the net introduces one pole at: the pole must be located at a frequency high enough not to distort the input waveform and at the same time, low enough to filter the switching frequency. in this application the equivalent resistance has been choosen req.=324-k w that fits well with the current amplifier design. the resulting r1 is 300k w and r2 is 12k w the pole has been placed a decade before the switching frequency: fp = 5khz that gives: b) in practice, in our test, a standard value of 2.7 nf as ben used. input voltage sensing (a), and equivalent circuit (b). a current mirror r 1 r 1 r 2 c 1 i ac (t) v l (t) i ac (t) r 1 r 1 r 2 c 1 + b v l (t) coupled inductor ys () 1 req ----------- 1 1st + -------------- = req r1 2 r2 + = t r1 2 ------- - //r2 c1 = fp 1 2 p t ---------------- - = c1 1 2 p fp r1 2 ------- - //r2 ? ?? -------------------------------------------------- 2.87nf ==
AN1606 application note 8/18 voltage feed-forward. voltage feed-forward, a useful function in wide range applications, requires a dc voltage proportional to the rms. value of the input mains. for the l4981, this value must be between 1.5v to 5.5v so that it can mirror over a wide range. since the rectified mains frequency is 100 -120hz, we need a large rejection for this frequency and because the feed-forward reaction time is proportional to the bandwidth, we introduce a second order filter that allows good compromise between attenuation of the fundamental frequency and response time. the circuit (fig.8) is similar to the fig.7 described earlier. figure 8. defining h lp (s) the transfer functions between the voltage from the inductor and the voltage at the output of the filter v lp (fig.8b), we have the following relation: c) the time constants cannot be expressed in simple way and so that the position of poles can be numerically cal- culated. the constant k lp is defined taking in to account the wide-range that is, v_mains is between 88v and 264v: d) choosing to calculate this value at the midpoint of the allowed values: e) voltage feed-forward circuit (a) and equivalent circuit (b). a r a r b r c c a v lp (t) r a c b b r a r c c a + v lp (t) r b r a c b coupled inductor h lp k lp 1 1st 1 + () 1st 2 + () ------------------------------------------------- = k lp r c ra 2rb 2rc ++ () ------------------------------------------------ - = v lp v rms 22 p ----------- k lp = 22 p ---------- - 88 264 + 2 ---------------------- - k lp 1.5 5.5 + 2 ---------------------- - =
9/18 AN1606 application note to fit this, it has been choosen for the capacitors, we set 80 db of attenuation on the fundamental frequency using the commercial values: - the design places two poles at 3hz and 14hz and 80 db of attenuation at 100hz. practical examples. the preceeding points of this note have described the topology peculiarity. remainder of the topics, for pfc design, are similar to standard p.f.c. boost applications based on l4981a/b (see the related references and application notes). starting from now, we can refer to real design examples. in fact, in order to verify the efficacy of the described configuration, it have been checked a pair of application's size. for evaluation porpoise, it has been realized a printed circuit. let us beginnes with and 800w p.f.c application. 800w target: 1 - wide range input voltage variation 110vrms to 220vrms. 2 - output power 800w. 2 - output voltage 400vdc. a switching frequency of 50 khz has been chosen as a good compromise between the coil-size and the pow- ermos switching losses. boost inductor design. to design the boost inductor, the parameters under consideration are the percentage current ripple (as low as possible) and the cost of the bobbin. this portion of the design is the same as for the standard topology. in this application, in place of a single inductor connected to one of the phases, it has been chosen to split the inductor into two sections (two windings on the same core) as shown in the connection diagram at fig.9. r a 998k w 2499 () o = r b 150k w = rc 30k w = ? ? ? ? ?? ca 390nf = cb 470nf = ? ??
AN1606 application note 10/18 figure 9. connection diagram for the coupled inductor realizing the inductor in this manner improves common mode rejection and avoids the effect of the difference between drain capacitance of the powermosfets. in order to simplify the model, assume a near unity coupling factor and the equivalent circuit is shown in figure 9b. the inductance is proportional to the square of the number of turns. for the two windings it will be: f) and the required number of turns for a given inductance on the same core is the same as it is for one winding or two windings. the only difference is that the two windings are separated into two sections. for simplicity we can design the coupled inductor using the same criteria as for a standard inductor - core size, number of turns, and size of copper wire. for the core, the preferred design is a gapped ferrite core set. the size of the core can be chosen considering the maximum current ipk. that, for the 800w target's parameters can exceed 14a (placing ipk. = 15a). g) where: for the 800w application, the nominal current ripple has been chosen around 25%. this fixes the boost induc- tance value l=450 m h. l i mains inductor z in i s (t) v s (t) z in i s (t) v s (t) leq. equivalent circuit. mains n n 2 --- - = n total n 2 --- - n 2 --- - + = v core v core ""min , 3 kli 2 peck (mm 3 ) = k1.410 4 lcore lgap -------------- =
11/18 AN1606 application note the coil requirements can be met using a gapped core set type e66/33/27, characterized with the following key parameters: ae = 550mm^3; lcore = 146mm; m_core = >1600; vcore = 80.4*10^3mm^3 the air gap needed to avoid saturation and optimize the coil size is equal to lap = 3mm. using the parameters in the formula g). vcore>67.5mm^3 this result confirms the core is well above the minimum size. the used formula for the number of turnes, needed to design the total required inductance l, is: h) the resulting n=38, in our solution, has been realized with 19 turns +19 turns. in order to minimize the high frequency losses, the winding has been made using the "multiple wire" approach. it is possible to estimate the losses for a low frequency current. imposing a maximum power value to be dissipated in the copper (pcu = 5w) i) using the formula for multiple wires: - l) were: in practice 20 wires were used, each having a diameter d=0.4 mm. output capacitor filter. for the bulk capacitor selection, we consider a reasonable 100hz voltage ripple. n l m 0 ----- - l core , m r core a , ----------------------------- 1gap a p 4 -- - 1gap + ? ?? 2 --------------------------------------------- + = p wire r dc i rms max , 2 5w < = r dc p wire i rms max , 2 ------------------------ - 60m w = < r dc r cu l turn n p 4 -- - d 2 m ----------------------- 60m w < =
AN1606 application note 12/18 m) were f is the input frequency. imposing <10vac the peak of voltage variation over 400vo, the co value will results >318 m f; the commercial value is 330 m f power devices. the selection of the power devices is dependent upon the topology and the size of the application. operating in continuous current mode, fast reverse recovery diodes are needed. the turboswitch "stm family", in the 600v voltage range, offers a very good solution for the two boost diodes, the stth8r06fp has been chosen. the insulated to-220 package makes it easy to assemble the parts on a heat sinke. concerning the powermos requirements, a 500v blocking voltage (bvdss) is needed, for this application. the chip selection is more complex. to find the best solution, it must be considered all the parameters that affect the power dissipation and to compare the results in terms of a cost to benefit ratio. the devices used in the 800w application (2+2), are the type sty34nb50f. the four powermos are efficiently driven without any additional buffer, thanks to the smart characteristics of the integrated driver. figure 10. 800w schemathic diagram. co po 2 p 2f d fo vo --------------------------------------------------- = l4981a/b 4 1 20 8 2 11 6 18 17 12 14 3 9 5 15 16 7 10 19 f 1 c 1 l 1 d 5 d 6 r 9 r 10 c 3 ntc c 4 r 11 r 12 r 14 r 15 c 5 r 17 c 6 c 7 r 18 c 8 r 19 c 10 r 21 c 12 13 l 2a l 2b l 2c detail for l2 l 2b l 2c l 2a vcc vcc l 3 vcc d 1 +d 2 +d 3 +d 4 r 1 dz 1 c 2 r 2 d 7 d 8 r 3 r 4 d 9 d 10 r 5 r 6 q 1 q 2 q 3 q 4 r 7 q 5 d 11 d 12 r 8 d 13 r 13 r 16 r 20 r 22 c 13 r 23 c 14 c 15 c 16 r 24 r 25 r 26 r 27 r 28 r 29 r 30 r 31 r 32 r 33 input c 11
13/18 AN1606 application note b.o.m. for 800w bridgeless evaluation circuit. l 2,#(1/ 50+50) # sense transformer; l 3#(1/50) # sense transformer #ferrites hy_perm.' diam.=20mm d 1,2,3,4 ; d 7,8,9,10,11,12,13 = 1n4148 ; dz 1 = 1n4746; q 5 = bs170 l 1 =450 m h; => e66*33*27-18+18 turns 3mm/gapped# 20 wires //m=0.4 mm each. d 5,6 = stth8r06fp; q 1,2,3,4 =sty34nb50f note: for the evaluation circuit and external coupled inductor emc where utilized. the filter has been achieved as follows: - coupled inductor (30 + 30) turns; wire diameter = 0.8mm on a toroidal (40x17x9 mm): - magnetizing inductance (each half inductor) lm=8mh and a leakage inductance, ld=50 m h. scaling down the application. as a second step, based on the same circuit, a 600w p.f.c. has been built. the target specification designed for server application is. 600w target: 1- wide range input mains 110vrms to 220vrms. 2- output power = 600w. 2- output voltage = 400vdc. the switching frequency has been set at 75khz to use a reduced size and high performance powermos. name value name value name value name value name value r 1 68 w r 2,3,4,5 10 w r 6 1.8 w r 7 100 w r 8 5 w r 9 2.7 k w r 10 1.5 k w r 11,12,14,15 1 m w r 13 22 k w r 16 25.5 k w r 17 3.9k w r 18 27 k w r 19 220 k w r 20 2.7 k w r 21 5.6 k w r 22,24,27 30 k w r 23,30,31,32,33 150 k w r 25,26,28,29 499 k w r 34 12 k w rsn 12 w c 1,3 1 m f c 2 220 m f c 4 330 m f c 5 10 nf c 6 1 m f c 7 1.8 nf c 8 1 m f c 10 120 nf c 11 1 nf c 12 5.6 nf c 13 470 nf c 14 2.7 nf c 15 100 nf c 16 390 nf ntc 2.5 b57364 f1 20a
AN1606 application note 14/18 boost inductor design. the boost inductor has been design as been previously described . for the 600w application, the nominal current ripple has been set around 22%, gives requires the inductance value l=440 m h. the inductor requirements can be met using the core set type e55/28/21, characterized with the following key parameters: a = 357mm^2; lcore = 123mm; m_core =>1600; vcore = 43.7mm^3 the needed air gap is: l ap =2.5mm. using the relation g), vcore>38.8mm^3 the result confirms that the core is good enough. using the relation h) , the resulting n=42. for the 600w, the coil has been realized with 21 turns +21 turns. for minimize the high frequency losses, the "multiple wire" solution has been used. imposing the copper losses (pcu = 3.8w), it has been used 14 wires having a diameter d = 0.4 mm each. output capacitor. for the selection of c o , the relation as been described in (m). the commercial value = 330 m f/450v used for the 800w application is still good for the 600w application. power devices. for the two boost diodes, as for the 800w application, the stth8r06fp has been used. concerning the powermos, the devices used in the 600w version application are two stw26nm50f.
15/18 AN1606 application note figure 11. 600w schemathic diagram. b.o.m. for 600w version bridgeless evaluation circuit. l 2,#(1/ 50+50) # sense transformer ; l 3#(1/50) # sense transformer #ferrites hy_perm.' diam.=20mm d 1,2,3,4 d 8,9,11,12,13 =1n4148; dz 1 =1n4746; q 5 = bs170. name value name value name value name value name value r 1 68 w r 3,4 10 w r 6 6.8 w r 7 100 w r 8 6.8 w r 9 2.7 k w r 10 1.5 k w r 11,12,14,15 1 m w r 13 22 k w r 16 25.5 k w r 17 3.9k w r 18 33 k w r 19 220 k w r 20 2.7 k w r 21 5.6 k w r 22,24,27 30 k w r 23,30,31,32,33 150 k w r 25,26,28,29 499 k w r 34 12 k w c 1,3 1 m f c 2 220 m f c 4 330 m f c 5 10 nf c 6 1 m f c 7 1.8 nf c 8 1 m f c 10 120 nf c 11 1 nf c 12 5.6 nf c 13 470 nf c 14 2.7 nf c 15 100 nf c 16 390 nf ntc 2.5 b 57364 f1 15 a l4981a/b 4 1 20 8 2 11 6 18 17 12 14 3 9 5 15 16 7 10 19 f 1 c 1 l 1 d 5 d 6 r 9 r 10 c 3 ntc c 4 r 11 r 12 r 14 r 15 c 5 r 17 c 6 c 7 r 18 c 8 r 19 c 10 r 21 c 12 13 l 2a l 2b l 2c detail for l2 l 2b l 2c l 2a vcc vcc l 3 vcc d 1 +d 2 +d 3 +d 4 r 1 dz 1 c 2 d 8 r 3 r 4 d 9 r 6 q 2 q 3 r 7 q 5 d 11 d 12 r 8 d 13 r 13 r 16 r 20 r 22 c 13 r 23 c 14 c 15 c 16 r 24 r 25 r 26 r 27 r 28 r 29 r 30 r 31 r 32 r 33 input c 11 r36 r35 c 9
AN1606 application note 16/18 l1=440 m h; => e55*28*21-21+21 turns 2.5mm/gapped# 14 wires // m=0.4 mm each. d 5,6 = stth8r06fp; q 2,3 = stw26nm50f note: for the evaluation circuit and external coupled inductor emc where utilized. the filter has been achieved as follows: - coupled inductor (30 + 30) turns; wire diameter = 0.8mm on a toroidal (40x16x8.5 mm): - magnetizing inductance (each half inductor) lm=8mh and a leakage inductance, ld=50uh. conclusion: the innovative bridgeless pfc configuration as described in this application note has been successfully tested. details have been presented how to implement the technology, which should prove interesting to designers. figure 12 shows the test results of efficiency and power dissipation for the application's 800w prototype. figure 12. efficiency 92 93 94 95 96 97 98 88 110 132 154 176 198 220 242 264 [%] v in b.less standard pfc p 0 =800 w dissipated power 0 10 20 30 40 50 60 70 80 88 110 132 154 176 198 220 242 264 v in [w] b.less standard pfc p 0 =800 w efficiency 92 93 94 95 96 97 98 88 110 132 154 176 198 220 242 264 [%] v in b.less standard pfc p 0 =800 w efficiency 92 93 94 95 96 97 98 88 110 132 154 176 198 220 242 264 [%] v in b.less standard pfc p 0 =800 w p 0 =800 w dissipated power 0 10 20 30 40 50 60 70 80 88 110 132 154 176 198 220 242 264 v in [w] b.less standard pfc p 0 =800 w dissipated power 0 10 20 30 40 50 60 70 80 88 110 132 154 176 198 220 242 264 v in [w] b.less standard pfc dissipated power 0 10 20 30 40 50 60 70 80 88 110 132 154 176 198 220 242 264 v in [w] b.less standard pfc b.less standard pfc p 0 =800 w p 0 =800 w
17/18 AN1606 application note evaluation results for the 800w version. evaluation results for the 600w version. references: - a) parsad n. enjeti, r. martinez "a high performance single phase ac to dc rectifier with input power factor correction" ieee apec'93 b) alexandre ferrari de souza and ivo barbi "a new zvs semi resonant high power factor rectifier with re- duced conduction losses" iee transactions on industrial electronics, vol.46, no.1 february 1999. c) stm application notes an628; an824. stmicroelectronics @ www.st.com, http://ccd.sgp.st.com/stonline/books/index.htm @vin=110vac: nominal power vout pout pin pf tdh efficiency 395vdc 800w 860w 0.999 4 94% @vin=220vac: nominal power 395vdc 800w 824w 0.997 8 97% @vin=110vac: nominal power vout pout pin pf tdh efficiency 395vdc 652w 700w 0.998 6.7 93% @vin=220vac: nominal power 395vdc 652w 624w 0.994 9 96.5%
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics a 2002 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan -malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com 18/18 AN1606 application note

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